The Apple II’s CPU clock has jitter or a glitch. This issue is not new—it has been present since its original design in 1977! Bald Engineer uses an oscilloscope to show how often the glitch occurs and how to correlate that jitter to its source—which is useful when you are not testing 40-year-old devices. The device under test (DUT) in this video is the Mega IIe project. It’s a fully compatible Apple IIe built around the Mega II chip.

During the component shortage, I got to know Raspberry Pi’s RP2040 microcontroller. It is a dual-core Arm Cortex-M0+ with about 262 kilobytes of RAM. The feature I like most is the programmable IO pins. These are small state machines that run independently of the Arm cores. They allow for some clever tricks. For example, I used them extensively on the Mega IIe project.

Out of context screenshots are out of context

On the Mini Apple IIe project, I am testing the composite/sync amplifier, which is an MC1377. The composite output looks great, until connecting the output cable to a receiver. It outputs about 2.6 Vpp until loaded with 75 ohms, then it drops to about 400 mVpp. We have replaced most of the passives on the output and have tried 3 different MC1377s. The measurements below are from a known good MC1377 removed from a working Apple IIgs.

Here is an MC1377 datasheet mirror link. The Figure references below match Page 8 of that datasheet. The biggest suspects are the Luma signals.

Not captured, but tested, none of the input signals change amplitude when the output (pin 9) is loaded with a 75 ohm load.

Problem: Update, SOLVED

Update: Turns out, R9 in the schematic above wasn’t fully soldered. After doing that, the computer now boots… at least, until it locks up.

These two screenshots are the same point, RCA Out Header in the schematic. On the left is the output when the node is left open. It is about 2.6Vpp with minimal DC offset. However, when the signal is terminated with a 75 ohm resistor (or a receiver circuit) it drops to about 300 mVpp!

00c-side-by-side uncropped