The Apple II’s CPU clock has jitter or a glitch. This issue is not new—it has been present since its original design in 1977! Bald Engineer uses an oscilloscope to show how often the glitch occurs and how to correlate that jitter to its source—which is useful when you are not testing 40-year-old devices. The device under test (DUT) in this video is the Mega IIe project. It’s a fully compatible Apple IIe built around the Mega II chip.

A long time ago, I made a video suggesting math was unnecessary to determine proper pull-up resistor values. Like most generalized statements, that suggestion is not always true. For example, in data buses like I2C, speeds like 400 kHz and 1 MHz are common. At those speeds, the pull-up resistor and the bus capacitance form an RC filter that fundamentally limits the data transmission speed. Or. It limits the range of pull-up resistor values. In this Workbench Wednesdays video, I show how to estimate I2C bus capacitance, measure that capacitance, and pick pull-up resistor values.

Parker and Stephen invited me back to discuss the Mega IIe project on the MacroFab Circuit Break podcast. This discussion was far more casual than my past appearances. It was the first time I didn’t feel the need to do any prep work for their excellent questions!

We talked through the overall experience of rev 1, rev 2, and rev 3. I appreciated the chance to talk about my motivations behind the Mega IIe project, why I like the Apple II platform so much, and getting to nerd out with Parker on analog video signal concepts.